Operation of JFET

Let us consider an N-channel JFET for discussing its operation.
1. When neither any bias is applied to the gate (i.e. when V GS = 0) nor any voltage to the drain w.r.t. source (i.e. when V DS
= 0), the depletion regions around the P-N junctions , are of equal thickness and symmetrical.
2. When positive voltage is applied to the drain terminal D w.r.t. source terminal S without connecting gate terminal G to
supply, as illustrated in fig. 9.4, the electrons (which are the majority carriers) flow from terminal S to terminal D whereas
conventional drain current I D flows through the channel from D to S. Due to flow of this current, there is uniform voltage drop
across the channel resistance as we move from terminal D to terminal S. This voltage drop reverse biases the diode. The gate
is more “negative” with respect to those points in the channel which are nearer to D than to S. Hence, depletion layers
penetrate more deeply into the channel at points lying closer to D than to S. Thus wedge-shaped depletion regions are formed,
as shown in figure. when Vd s is applied. The size of the depletion layer formed determines -the width of the channel and
hence the magnitude of current I D flowing through the channel.
To see how the width of the channel varies with the variation in gate voltage, let us assume that the gate is negative biased
with respect to the source while the drain is applied with positive bias with respect to the source. This is shown in the figure
above. The P-N junctions are then reverse biased and depletion regions are formed. P regions are heavily doped compared to
the N-channel, so the depletion regions penetrate deeply into the channel. Since a depletion region is a regions depleted of
the charge carriers, it behaves as an insulator. The result is that the channel is narrowed, the resistance is increased and
drain current ID is reduced. If the negative voltage at the gate is again increased, depletion layers meet at the centre and the
drain current s cut-off completely. If the negative bias to the gate is reduced, the width of the depletion layers gets reduced
causing decrease in resistance and , therefore, increase in drain current ID .(The gate-source voltage V GS at which drain
current I D is cut-off completely (pinched off) is called the pinch-off voltage Vp . It is also to be noted that the amount of
reverse bias is not the same throughout the length of the P-N junction. When the drain current flows through the channel,
there is a voltage drop along its length. The result is that the reverse bias at the drain end is more than that at the source
end making the width of depletion layer more at the drain. To see how the width of the channel varies with the variation in
gate, go through the figure above.