Sap -1 Architecture and description

 SAP-1 Block Diagram and Description \

 1.      Program Counter description

The program is stored at the beginning of the memory with the first instruction at binary address 0000, the second instruction at 0001, the third at address 0010 and so on. The program counter which is part of the control unit, counts from 0000 to 1111. Its job is to send to the memory the address of the next instruction to be fetched and executed by sap1 (simple as possible).

      The program counter is reset to 0000 before each computer run. When the computer run begins, the program counter sends the address 0000 to the memory. The program counter is then incremented to get 0001. After the first instruction is fetched and executed, the program counter sends address 0001 to the memory. Again the program counter is incremented. After the second instruction is fetched and executed, the program counter sends address 0010 to the memory. So this way, the program counter keeps track of the next instruction to be fetched and executed.

      The program counter is like someone pointing a finger at a list of instructions saying do this first, do this second, do this third, etc. This is why the program counter is called a pointer; it points to an address in memory where the instruction or data is being stored.

2.      Input & MAR

The Input and MAR includes the address and data switch registers. Switch registers are part of input unit, allows us to send 4 address bits and 8 data bits to the RAM.

The memory address register (MAR) is the part of SAP-1 memory. During a computer run, the address in the program counter is latched in to the MAR. A bit later, the MAR applies this 4-bit address to the RAM where a read operation is performed.

3.      The RAM

The RAM is a 16 X 8 static TTL RAM. We can program the RAM by means of the address and data switch registers. This allows you to store a program and data in the memory before a computer run.

During a computer run, the RAM receives 4-bit addresses from the MAR and a read operation is performed. In this way, the instruction or data word stored in the RAM is placed on the W bus for use in some other part of the computer.

4.      Instruction Register

The instruction register is the part of the control unit. To fetch an instruction from the memory the computer does a memory read operation. This places the contents of the addressed memory location on the W bus. At the same time, the instruction register is set up for loading on the next positive clock edge. The content of the instruction register are split into two nibbles. The upper nibble goes directly to the block “Controller – Sequencer”. The lower nibble is read onto the W bus when needed.

5.      Controller – Sequencer

Before each computer runs, a CLR signal is sent to the program counter and CLK signal to the instruction register. This resets the program counter to 0000 and wipes out the last instruction in the instruction register.

      A clock signal CLK is sent to all buffer registers; this synchronizes the operation of the computer ensuring that things happen when they are supposed to happen.

      The 12 bits that come out of the controller sequencer form a word controlling the rest of the computer (like a supervisor telling others what to do). The 12 wires carrying the control word are called the control bus. The control word has the format of: CON = C_P E_P L_M C_E   L₁ E₁ L_A E_A   S_UE_UL_BL_O

      This word determines how the registers will wait to the next positive CLK edge. For example, a high E_P and a low L_M means that the program counter are latched into the MAR on the next positive clock edge. As another example, a low CE and a low L_A means that the addressed RAM word will be transferred to the accumulator.

6.      Accumulator

The accumulator (A) is a buffer register that stores intermediate data for every mathematical and logical operation.It acts as a one of the operand for every arithmetical operation and data after operation is stored in accumulator . Accumulator has two outputs, one directly goes to the adder-subtractor and the other goes to the W bus.

7.      The Adder – Subtractor

SAP-1 uses a 2’s complement adder-subtractor. The addition or  subtraction according to the instruction is performed by this block.

 When S_U is low in this block, the sum out of the adder-subtractor is S = A + B. When S_U is high, the difference appears as A = A + B ’.

8.      B Register

The B register is another buffer register. It is used in arithmetic operations. A low L_B and positive clock edge load the word on the W bus into the B register. The two state output of the B register drives the adder-subtractor, supplying the number to be added or subtracted from the content of the accumulator.

9.      Output Register

The result after addition or subtraction is stored in the Accumulator and it is to be displayed to the outside world hense output register is used for this purpose. This is where the output register is used.

      When E_A is high and L_O is low, the next positive clock edge loads the accumulator content to the output register. The output register is often called an output port because the processed data can leave the computer through this register.

10.  Binary Display

The binary display is a row of eight light emitting diodes (LED’s). Because each LED connects to one flip-flop of the output port, the binary display shows us the content of the output port. Therefore, after we transferred an answer from the accumulator to the output port, we can see the answer in binary form.