8237 pins diagram and description

•CLK: System clock

•CS΄: Chip select (decoder output)

•RESET: Clears registers, sets mask register

•READY: 0 for inserting wait states

•HLDA: Signals that the μp has relinquished buses

•DREQ3 – DREQ0: DMA request input for each channel

•DB7-DB0: Data bus pins

•IOR΄: Bidirectional pin used during programming

and during a DMA write cycle

•IOW΄: Bidirectional pin used during programming

and during a DMA read cycle

•EOP΄: End of process is a bidirectional signal used as input to terminate a DMA process or as output to signal the end of the DMA transfer

•A3-A0: Address pins for selecting internal registers

•A7-A4: Outputs that provide part of the DMA transfer address

•HRQ: DMA request output

•DACK3-DACK0: DMA acknowledge for each channel.

•AEN: Address enable signal

•ADSTB: Address strobe

•MEMR΄: Memory read output used in DMA read cycle

•MEMW΄: Memory write output used in DMA write cycle