Fundamentals of Digital Systems (FDS) ,Nepal
Grade: IX Time: 4 hours/week
Total Time: 32 weeks Theory: 64 hours (50%)
Practical: 64 hours (50%)
Course description:
This course provides basic knowledge and skills on logic design and digital circuit design with logic
circuits. This course also provides elementary concepts on algorithmics.
Course objectives:
After the completion of this course students will be able to:
1. Comprehend the existence of various number systems and their use in digital systems
2. Recognize the link between Boolean algebra and logic gate functions
3. Assemble simple binary arithmetic processing circuitry
4. Build logic circuits for few basic combinational logic processing
5. Explain and realize the fundamental memory unit of digital logic design
6. Select a better solution among algorithmic solutions prepared for a particular task
Course Contents:
THEORY
Part I: Digital Logic
Unit-1: Number Systems (8 Hours)
1.1.Numbering concept
1.2.General form in power series expression
1.3.Different Types of numbering system
1.3.1 Decimal numbers
1.3.2 Binary numbers
1.3.3 Octal numbers
1.3.4 Hexadecimal numbers
1.4.Number conversion
1.4.1 Decimal Integers to Binary and Binary to Decimal conversion
1.4.2 Decimal Fractions to Binary conversion
1.4.3 Octal to Decimaland Decimal to Octal conversion
1.4.4 Decimal Fractions to Octal conversion
1.4.5 Hexadecimal to Decimal and Decimal to Hexadecimal conversion
1.4.6 All conversions between any two of Binary, Octal, and Hexadecimalnumbers
1.4.7 Miscellaneous
1.4.7.1 Number ranges
1.4.7.2 Unsigned number
1.4.7.3 Signed number
1.4.7.4 Coded Numbers
1.4.7.4.1 Binary Coded Decimal (BCD)
1.4.7.4.2 ASCII Code
Unit-2: Binary Arithmetic Operations (4 Hours )
2.1 1’s complement operation
2.2 2’s complement operation
2.3 Addition operation
2.4 Subtraction operation
2.5 Multiplication operation
2.6 Division operation
2.7 BCD number operations
Unit-3: Binary Processing for Two-State Device (2 Hours )
3.1 Property of electric switch
3.2 Various combinations of multiple switches
3.3 Transfer and switch function in table form
3.4 Relation between switches and Boolean functions
Unit-4:Logic Gate Concepts (6 Hours )
4.1 Notations
4.2 Concept of Gate and functions
4.2.1 Inverter
4.2.2 OR gate
4.2.3 AND gate
4.2.4 NOR gate
4.2.5 NAND gate
4.2.6 XOR gate
4.2.7 XNOR gate
4.2.8 ISO Standard symbols for gates
4.2.9 Universal gates
4.3 De Morgan’s Theorems
4.3.1 The First Theorem
4.3.2 The Second Theorem
4.3.3 Realization through universal gates
4.4 Realization of all gates through Universal gates
4.5 Parity generator and significance
4.6 Gates in a logic circuits and pin configuration of gates
Unit-5: Boolean Algebra and Karnaugh Map (5 Hours)
5.1.Boolean relations
5.2.Simplification
5.2.1 Sum-of-Product (SOP)
5.2.2 Product-of-Sum (POS)
5.2.3 Algebraic simplification
5.3. Karnaugh Map (K-Map) Simplification
5.3.1 Pair, quad, octets
5.3.2 K-map method based simplification up to four variable
5.4. Don’t-Care conditions
Unit-6: Binary Arithmetic Circuits (3 Hours)
6.1 Half adders
6.2 Binary adders
6.3 Half subtracters
6.4 Full adders
6.5 Full subtracters
6.6 2’s complement adder-subtracter
Unit-7: Combinational Logic Circuits (6 Hours)
7.1 Code converters
7.1.1 Decoders
7.1.2 Encoders
7.1.3 Circuit implementations
7.2 Multiplexers
7.2.1 Multiplexer logic
7.2.2 Demultiplexer logic
7.2.3 Circuit implementation
7.3 7-segment decoders
7.3.1 7-segment decoder function
7.3.2 Circuit implementation
Unit-8: Basic Memory Unit: Sequential Circuit (5 Hours)
8.1 Basic Concepts
8.1.1 Latching effect
8.1.2 Level Clocking
8.1.3 Trigger and types
8.2 RS Flip-Flop
8.3 T-Flip-Flop
8.4 D-Flip-Flop
8.5 JK- Flip-Flop
8.6 JK- Master Slave Flip-Flop
8.7 Extensions
8.7.1 Basic concept of Register
8.7.2 Basic concept of Counter
8.7.3 Basic concept of ROM and RAM
Part II: Algorithmics
Unit-9: Symbolic Logic Processing (8 Hours)
9.1 Background
9.2 Propositions
9.2.1 Simple Propositions
9.2.2 Operators
9.2.2.1 Conjunction
9.2.2.2 Disjunction
9.2.2.3 Negation
9.2.2.4 Implication
9.2.2.5 Equivalence
9.2.3 Conditional Propositions
9.2.4 Application of Equivalences
9.3 Quantification
9.3.1 Predicates
9.3.2 Universal Quantification
9.3.3 Existential Quantification
9.3.4 Evaluating Quantified expressions
9.4 Basic Concept of Inference
9.4.1 Arguments
9.4.2 Rule of Inference
9.4.3 Direct Proofs
9.4.4 Proof by Contraposition
9.4.5 Proof by Contradiction
9.5 Mathematical Induction
9.5.1 Principle of mathematical induction
9.5.2 Weak and Strong induction
Unit-10: Efficiency of Algorithm (2 Hours)
10.1 Background
10.2 Average and worst-case analyses (O-Notation based measurement)
Unit-11: Finite Probability (2 Hours)
11.1 Basics
11.2 Conditional Probability
11.3 Probabilistic Reasoning
PRACTICAL
Unit-3: Binary Processing for Two-State Device (6 Hours)
3.2 Verify Different combination of multiple switches output
3.4 Establish relation between switch and Boolean function
Unit-4:Logic Gate Concepts (18 Hours)
4.1 Draw the exact notations of logic gates
4.2 Prepare the list of application of all gates functionality with verification
4.3 Verify the De Morgan’s Theorem through gate circuit
4.4 Realize different gates functionality using universal gates
4.5 Generate parity bit for certain bit-word
4.6 Identify the logic gates pin configuration
Unit-5: Boolean Algebra and Karnaugh Map (6 Hours)
5.3 Realize the complex functionality in simplified form using Karnaugh-map method
5.4 Use Don’t care condition values in simplification process
Unit-6: Binary Arithmetic Circuits (15 Hours)
6.1– 6.6 Construct all types of adder subtracter circuits
Unit-7: Combinational Logic Circuits (12 Hours)
7.1 Build encoder/decoder circuit
7.2 Build multiplexer/demultiplexer circuit
7.3 Design and test a project using 7-segment display
Unit-8: Basic Memory Unit: Sequential Circuit (8 Hours)
8.6 Build an application using JK-master-slave flip-flop and verify the function
Unit-10: Efficiency of Algorithm (12 Hours)
10.2 (a) Prepare 3 different searching (or sorting) program codes
10.2 (b) Insert controlled delay within the loops
10.2 (c) Measure the time-stamps of start and stop of the programs with variable delay
10.2 (d) Measure the average and worst case performance of the algorithms
Text books:
1. Mano, M.M. and Kime, C.R. (2001).Logic and Computer Design (2nd ed.).Prentice-Hall
of India.
2. Malvino, A.P. and Brown, J.A. (1996). Digital Computer Electronics (3rd ed.). Tata
McGraw-Hill.
3. Brassard, G. and Bratley, P. (1996).Fundamentals of Algorithmics.Prentice-Hall of India.
4. Rosen, K. H.(2008). Discrete Mathematics and Its Applications, (6th ed.) Tata McGraw-
Hill.
Grade: IX Time: 4 hours/week
Total Time: 32 weeks Theory: 64 hours (50%)
Practical: 64 hours (50%)
Course description:
This course provides basic knowledge and skills on logic design and digital circuit design with logic
circuits. This course also provides elementary concepts on algorithmics.
Course objectives:
After the completion of this course students will be able to:
1. Comprehend the existence of various number systems and their use in digital systems
2. Recognize the link between Boolean algebra and logic gate functions
3. Assemble simple binary arithmetic processing circuitry
4. Build logic circuits for few basic combinational logic processing
5. Explain and realize the fundamental memory unit of digital logic design
6. Select a better solution among algorithmic solutions prepared for a particular task
Course Contents:
THEORY
Part I: Digital Logic
Unit-1: Number Systems (8 Hours)
1.1.Numbering concept
1.2.General form in power series expression
1.3.Different Types of numbering system
1.3.1 Decimal numbers
1.3.2 Binary numbers
1.3.3 Octal numbers
1.3.4 Hexadecimal numbers
1.4.Number conversion
1.4.1 Decimal Integers to Binary and Binary to Decimal conversion
1.4.2 Decimal Fractions to Binary conversion
1.4.3 Octal to Decimaland Decimal to Octal conversion
1.4.4 Decimal Fractions to Octal conversion
1.4.5 Hexadecimal to Decimal and Decimal to Hexadecimal conversion
1.4.6 All conversions between any two of Binary, Octal, and Hexadecimalnumbers
1.4.7 Miscellaneous
1.4.7.1 Number ranges
1.4.7.2 Unsigned number
1.4.7.3 Signed number
1.4.7.4 Coded Numbers
1.4.7.4.1 Binary Coded Decimal (BCD)
1.4.7.4.2 ASCII Code
Unit-2: Binary Arithmetic Operations (4 Hours )
2.1 1’s complement operation
2.2 2’s complement operation
2.3 Addition operation
2.4 Subtraction operation
2.5 Multiplication operation
2.6 Division operation
2.7 BCD number operations
Unit-3: Binary Processing for Two-State Device (2 Hours )
3.1 Property of electric switch
3.2 Various combinations of multiple switches
3.3 Transfer and switch function in table form
3.4 Relation between switches and Boolean functions
Unit-4:Logic Gate Concepts (6 Hours )
4.1 Notations
4.2 Concept of Gate and functions
4.2.1 Inverter
4.2.2 OR gate
4.2.3 AND gate
4.2.4 NOR gate
4.2.5 NAND gate
4.2.6 XOR gate
4.2.7 XNOR gate
4.2.8 ISO Standard symbols for gates
4.2.9 Universal gates
4.3 De Morgan’s Theorems
4.3.1 The First Theorem
4.3.2 The Second Theorem
4.3.3 Realization through universal gates
4.4 Realization of all gates through Universal gates
4.5 Parity generator and significance
4.6 Gates in a logic circuits and pin configuration of gates
Unit-5: Boolean Algebra and Karnaugh Map (5 Hours)
5.1.Boolean relations
5.2.Simplification
5.2.1 Sum-of-Product (SOP)
5.2.2 Product-of-Sum (POS)
5.2.3 Algebraic simplification
5.3. Karnaugh Map (K-Map) Simplification
5.3.1 Pair, quad, octets
5.3.2 K-map method based simplification up to four variable
5.4. Don’t-Care conditions
Unit-6: Binary Arithmetic Circuits (3 Hours)
6.1 Half adders
6.2 Binary adders
6.3 Half subtracters
6.4 Full adders
6.5 Full subtracters
6.6 2’s complement adder-subtracter
Unit-7: Combinational Logic Circuits (6 Hours)
7.1 Code converters
7.1.1 Decoders
7.1.2 Encoders
7.1.3 Circuit implementations
7.2 Multiplexers
7.2.1 Multiplexer logic
7.2.2 Demultiplexer logic
7.2.3 Circuit implementation
7.3 7-segment decoders
7.3.1 7-segment decoder function
7.3.2 Circuit implementation
Unit-8: Basic Memory Unit: Sequential Circuit (5 Hours)
8.1 Basic Concepts
8.1.1 Latching effect
8.1.2 Level Clocking
8.1.3 Trigger and types
8.2 RS Flip-Flop
8.3 T-Flip-Flop
8.4 D-Flip-Flop
8.5 JK- Flip-Flop
8.6 JK- Master Slave Flip-Flop
8.7 Extensions
8.7.1 Basic concept of Register
8.7.2 Basic concept of Counter
8.7.3 Basic concept of ROM and RAM
Part II: Algorithmics
Unit-9: Symbolic Logic Processing (8 Hours)
9.1 Background
9.2 Propositions
9.2.1 Simple Propositions
9.2.2 Operators
9.2.2.1 Conjunction
9.2.2.2 Disjunction
9.2.2.3 Negation
9.2.2.4 Implication
9.2.2.5 Equivalence
9.2.3 Conditional Propositions
9.2.4 Application of Equivalences
9.3 Quantification
9.3.1 Predicates
9.3.2 Universal Quantification
9.3.3 Existential Quantification
9.3.4 Evaluating Quantified expressions
9.4 Basic Concept of Inference
9.4.1 Arguments
9.4.2 Rule of Inference
9.4.3 Direct Proofs
9.4.4 Proof by Contraposition
9.4.5 Proof by Contradiction
9.5 Mathematical Induction
9.5.1 Principle of mathematical induction
9.5.2 Weak and Strong induction
Unit-10: Efficiency of Algorithm (2 Hours)
10.1 Background
10.2 Average and worst-case analyses (O-Notation based measurement)
Unit-11: Finite Probability (2 Hours)
11.1 Basics
11.2 Conditional Probability
11.3 Probabilistic Reasoning
PRACTICAL
Unit-3: Binary Processing for Two-State Device (6 Hours)
3.2 Verify Different combination of multiple switches output
3.4 Establish relation between switch and Boolean function
Unit-4:Logic Gate Concepts (18 Hours)
4.1 Draw the exact notations of logic gates
4.2 Prepare the list of application of all gates functionality with verification
4.3 Verify the De Morgan’s Theorem through gate circuit
4.4 Realize different gates functionality using universal gates
4.5 Generate parity bit for certain bit-word
4.6 Identify the logic gates pin configuration
Unit-5: Boolean Algebra and Karnaugh Map (6 Hours)
5.3 Realize the complex functionality in simplified form using Karnaugh-map method
5.4 Use Don’t care condition values in simplification process
Unit-6: Binary Arithmetic Circuits (15 Hours)
6.1– 6.6 Construct all types of adder subtracter circuits
Unit-7: Combinational Logic Circuits (12 Hours)
7.1 Build encoder/decoder circuit
7.2 Build multiplexer/demultiplexer circuit
7.3 Design and test a project using 7-segment display
Unit-8: Basic Memory Unit: Sequential Circuit (8 Hours)
8.6 Build an application using JK-master-slave flip-flop and verify the function
Unit-10: Efficiency of Algorithm (12 Hours)
10.2 (a) Prepare 3 different searching (or sorting) program codes
10.2 (b) Insert controlled delay within the loops
10.2 (c) Measure the time-stamps of start and stop of the programs with variable delay
10.2 (d) Measure the average and worst case performance of the algorithms
Text books:
1. Mano, M.M. and Kime, C.R. (2001).Logic and Computer Design (2nd ed.).Prentice-Hall
of India.
2. Malvino, A.P. and Brown, J.A. (1996). Digital Computer Electronics (3rd ed.). Tata
McGraw-Hill.
3. Brassard, G. and Bratley, P. (1996).Fundamentals of Algorithmics.Prentice-Hall of India.
4. Rosen, K. H.(2008). Discrete Mathematics and Its Applications, (6th ed.) Tata McGraw-
Hill.
No comments:
Post a Comment
its cool